|この記事は、コンパクトかつわかりやすくするために MCRedstoneSim 形式の図を用いて記述されています。
- 1 コンピューター
- 2 加算器
- 2.1 バージョン1
- 2.2 直列バージョン
- 2.3 バージョン2
- 2.4 Version 3
- 2.5 Fast Adders
- 2.6 4 Bit Adder
- 2.7 4 Bit Adder (Alternate Design)
- 2.8 Converting an Adder to a Subtractor or implementing an Add/Subtract switch
- 3 Logic units
- 4 Converters
- 5 Misc
- 5.1 Order Insensitive Combination Locks
- 5.2 Sorting Device
- 5.3 Order-sensitive changing code XNOR Combo Lock
- 5.4 Order-sensitive RSNOR Combo Lock
- 5.5 Timer
- 5.6 Serial interface lock with D flip-flops
- 6 See also
全加算器は2つの入力A および B と下位桁からの桁上がり (C') の有無を計算し、同桁の和 (S) および桁上がり (C) の出力を生成する。全加算器は2つの排他的論理和回路 (XOR) と2つの論理積回路 (AND) と1つの論理和回路 (OR) で構成される。一部の場合においてこれら回路は圧縮することができる（両方の AND回路に既に XOR回路が存在し、OR回路が単なるレッドストーンワイヤーになってしまうため）。
A と B はビット入力で C' は桁上がり入力である。A と B の加算した合計 (S) 出し、さらにそれは C として用いる。そして全加算器のモジュールがタイリングされ、C と C' が繋がった時、桁上がり出力が次のモジュールへ伝播する。
半加算器は2つ目の XOR回路が削除され、1つ目の XOR回路の出力先が同桁の和になることを除いては全加算器とほぼ同じである。C'（下位桁からの桁上がり）はないが C（桁上がり出力）は依然として存在し、最初の全加算器に C を与える。いくつかの演算装置は桁上がり機能を利用するために最初のビットに半加算器を用いない（最初のビットで下位桁から桁上がりすることができる）。
論理回路: XNOR, IMPLIES
この加算器は2つのビットを取り、それらを加算する。結果のビットは S（同桁の和）の出力になる。両方のビットが1の場合、桁上がりが発生し、C は1になる（この回路の場合は、C のため、0）。この半加算器は反転 (NOT) していない C を出力するよう変更できるが、これは全加算器の連鎖の始まりとして使用できるような構成である。
補足: 自分のような高度なレッドストーン回路を初めて使用した方には次の説明がわかりやすいかも知れない。出力B (C) に信号を反転させる NOT回路があり、鉄のドアやピストンドア等につながっているとする。S は床を制御する粘着ピストンにつながっている。入力A が ON になった時、ドアが開き、床が消える。入力B は床のみを制御するが、入力A が ON の時は、入力B が両方を制御する。両方が ON の場合は、入力A は床にのみ影響する。これはつまり、もしプレイヤーがサーバーを離れており中に誰も入れたくない場合、A と B を ON にしておけば、誰かが A を OFF にした時、床は消えるが、ドアは開かないため、秘密を知っていない限り入ることはできない。
Gates: XNOR (2), IMPLIES, NOT, OR, AND
Size: 6X12X5 Ceiling to floor, including I/O spaces.
This adder will take 2 bits and a carried over bit (actually C, rather than C, a value held in the redstone in the bottom left corner on layer 1) and add them all together, producing a sum (S) bit and a carry (actually C rather than C).
In order to make a subtracter, simply invert one of the binary inputs (the 1st or 2nd number). If the number is negative, the answer comes out inverted. In real computers, the first bit (also called the sign) decides whether the number is positive or negative, if you include this (applying the same inverting rule) you can detect whether the number is negative, or if it is just a big number.
When using the gates above; mind the inputs and outputs. You may be wondering why there are so many inverted signals being used instead of the regular signal.
The adders shown here use XNOR gates rather than XOR gates because they are more compact, and as a result, implies gates must be used instead of AND gates, which also happen to be more compact.
Therefore for the most compact adder, inverse signals must be used. These adders are too complex to be easily deciphered with 2 layers per square, so each single layer has been drawn separately to ease the building process.
Carry input and output are aligned to easily connect many of these modules in series.
Redstone wire: 15
When Building Advanced digital circuits like Computers and multipliers, The adders used must be as fast as posible to ensure maximum running speed. Simple adders Have one fundamental speed problem which numerous adder designs try to correct to speed up. The issue is carry propagation delay: delay caused by the way adders borrow carries. we can see this when we do the problem 1111 + 0001
1111 0001 ---- 1110
This is the first step of the addition process, XORing the two inputs. Because there were two 1s in the least significant bit, the AND gate activates and carries to the next bit
1 1111 0001 ---- 1100
but here is the issue: You now need to borrow a carry again because in the two's place there are two ones. This is done by ANDing the output of the first half-adder with the carry from the previous bit and this is a huge issue. Because for the next bit you AND the borrowed carry again, and again. Each AND gate takes 2 ticks so in order to calculate all of the carries that need to be added up in the final step it takes 2 ticks times 4 bits or 8 ticks.
imagine you see the problem 999 + 1 you don't sit around thinking "9 + 1 is 10 carry 1 so 9 + 1 is 10 carry the 1, so 9 + 1 is 10 so 1000." its the same situation in an advanced circuit. You need fast results
Real electrical engineers and Creative Redstoners have designed circuits that calculate adder carries faster than this sequential method
Incidentally Adders that Calculate carries one at a time in this fashion are called Ripple Carry adders
One of the simplest and most classic ways of solving the ripple carry problem is to use Instant and gates that use pistons. These adders are simple and fast but are inconstant because they use piston. When blocks are accidentally dropped, the entire circuit breaks. PIstons also have timing awkwardness that can be excruciatingly inconvenant when building an advanced circut that relies heavily on timing
Whenever A carry is created, it is sent onto the wire with the lever on it and instead now instead of going through an AND gate, the Piston retracts and the carry can move on to the next bit which adds no carry propagation dealy at all (until the signal strength runs out)
This video shows a straightforward implementation of the logic. The design large and spread out so its easy to see each individual part of the adder and the carry logic. In fact, I believe that the person who made this adder was the original creator of the adder
Sticky Pistons: 2
T = T Flip Flop
Out | C--T--In | C out
Sticky Pistons: 2
Note: Cin and The in must be pulses or it will not work!
Note! The least significant digit ("ones" digit) is on the left of the diagram so that the progression from half adder to the full adders can be seen more clearly. Reverse the diagram if you want a conventional left to right input.
Gates: XNOR (7), IMPLIES (4), NOT (4), OR (3), AND (3)
This adder will take 2, 4 bit numbers (A and B) and add them together, producing a sum (S) bit for each bit added and a carry (C) for the whole sum. The sum bits are in the same order as the input bits, which on the diagram means that the leftmost S output is the least significant digit of the answer. This is just an example of a string of adders; adders can be strung in this way to add bigger numbers as well.
The same function but a different design with 4 full adders instead of 1 half adder and 3 full adders
NOTE: switches are inputs A and B (top switch C input)
Subtracting and adding are the same thing when reduced down to the idea that, for example 3-2 = 3 + (-2) = 1. Since we already have the framework in place to add bits, it is fairly simple subtract by just adding the negative bit. The problem lies in the representation of negative numbers.
We are all familiar with the elementary school concept of "borrowing" in subtraction from the next column like this:
5623 - 128 -----
We are not capable of taking 8 from three, so we "borrow" a 1 from the next decimal place to allow us to subtract 8 from 13 instead, resulting in 5
1 5623 - 128 ----- 5
Computers are not capable of assumptions, so when a computer needs to find a negative it does not (and can not) put a negative sign in front of the input. It just subtracts from zero "borrowing" from the next column like so:
000000 - 3 ------- -999997
This is the same in binary. Let us, for example use a 4 bit binary number for the example:
1 11 111 1111 0000 0000 0000 0000 -0011 -0011 -0011 -0011 ----- ----- ----- ----- - 1 - 01 - 101 -1101
We could repeat this forever, but that would be useless. This about what a 4 bit register does: it truncates after 4 bits worth of data. So after we truncate the number (which I kindly did for you in the example, otherwise the number would have an infinite number of 1's to the left). Thanks to this little perk, we can do whatever we want to the 0's after the four of them, including (which will prove to be fantastically useful later) adding a single 1 in front of them.
10000 -0011 ----- 1101 <-- NOTE!!! This number is positive! Success!
Remember how we said that our redstone had no special way of designating a negative from a positive? We just created a way. If the most significant (first) bit of a number is 1 that means that it is a negative number. This fantastic perk of binary numbers is a theorem called "Two's Complement".
Formally Two's Complement is defined as:
The negative of a number b with bit length n is equal to 2^(n+1) - b
Essentially what this is saying that -b is just the inversion of b (exchange 1's for 0's and 0's for 1's) plus 1.
What we have done is turn the first bit into a "negative sign" if it is on, but if you have been reading this you realize it is not that simple. Numbers that have a negative sign like this are commonly referred to as Signed integers. Numbers like in a normal adder, where two's compliment is not taken into effect are called Unsigned integers. Unsigned integers can go to a higher value, but cannot go below zero where as signed integers can only go half as high, but they can go equally as far below zero. This means that the two numbers have the same range, it is just in a different location like so (this is with a 8 bit number):
Unsigned: 0-255 Signed -128-127
It should be noted that some strange effects can take place when using the lowest signed value (in this case -128) so this should be avoided.
Now that we have a positive way of representing our negative numbers it is very trivial to implement this into an adder. Currently our adder solves
A + B
We want it to solve
A - B
A + (-B)
Therefore, if we enter the two's complement of B, our adder becomes a subtractor. This is easily implemented by using the Carry-in bit of the least significant (first) bit as the "+1" and then all that is left is to invert B.
There is one important thing to note when implementing this. Because it is possible to get a two's complement number out, when subtracting the most significant digit must be inverted. This is usually the Carry out of the last adder.
This can all be implemented to an adder like so:
A control bit is added to the circuit such that when it is on, the unit subtracts and when it is off the unit adds. After this, add XOR gates between the control bit and each B input. Route the output of each XOR to the B input of each adder. Finally, to make the unit Two's compliment compatible a final XOR gate must be added between the control bit and the carry out of the most significant bit.
This is the simplest way to implement negatives and subtraction in a CPU as it will add gracefully and store well in registers. If this is to be implemented in a calculator, simply subtract 1 from the output and then invert all the outputs except the most significant. The most significant bit will be on if the number is negative.
In circuits, it might be useful to have a logic unit that will, based on the input, decide which output is to be chosen. Such a unit can then be used for more complex circuits, such as an ALU.
This is an example of a 2-bit logic unit that will have four states depending on the input.
The outputs are in top row, with 11, 00, 01, 10 order (input order: first first, bottom second).
This is another example of a simplified version using Gray codes. The output appears at the torches at the end of the top rows. This design can be extended to any number of bits, but practical limitations due to timing considerations restrict the use of more than a byte or so. The outputs are triggered by the inputs 11, 01, 00, 10, respectively.
The Arithmetic logic unit (ALU) is the central part of the CPU. It does calculations and logical processing and then passes this information to a register. The ALU on basis of the input it selects a specific function, performs, and then gives the result.
The ALU shown below is a 1 bit ALU with the functions: ADD, AND, XOR. It takes the A and B inputs and then performs the selected functions. Read about the adders to see how the ADD function works. XOR and AND are basic functions that is explained on the logic circuits page. There can be more functions added to an ALU like multiplication, division, OR, NAND... etc. These functions could with some modifications be added to this 1 bit ALU.
This 1 bit ALU can be linked to each other to create an as many bit ALU as possible. Just like adders you need to connect the Carry out (Cout) to the Carry in (Cin) of the next ALU
This is a screenshot of the actual 1 bit ALU in Minecraft. You can view the ALU in 3D here.
These circuits simply convert inputs of a given format to another format. Converters include Binary to BCD, Binary to Octal, Binary to Hex, BCD to 7-Segment, etc.
You can understand this design as a combination of AND gates.
Demultiplexer is a circuit that uses the following logic:
Output 0 = (~bit2) & (~bit1) & (~bit0)
Output 1 = (~bit2) & (~bit1) & (bit0)
and so on.
The most obvious way to implement a demultiplexer would be to put a whole bunch of logic gates and connect them together, but even with 3 or 4 bits it turns into a mess.
If you look at the binary numbers table, you can notice a pattern.
If the number of bits is Q, the most significant bit reverses every Q/2 numbers, the next bit reverses every Q/4 numbers an so on until we get to the Qth bit.
Therefore we should make a circuit that looks like this:
where the green triangles are non-reversing and red triangles are reversing. The black lines are imaginary AND gates.
We can easily implement this using 3 "punch cards" that consist of solid blocks and air. The "punch cards" or the masks are being moved by pistons with slime blocks.
So the signal is only being propagated if all three layers of masks align in a specific way.
ファイル:Bits demux38.pngOpen the picture to see the layers.
As you can see, this system is very compact and comprehensible.
You can use this in reverse as well (not as a multiplexer, but if you reverse the repeaters the signal from every ex-outptut (0–7) will only propagate if it matches the current state of the demultiplexer, so it works like "Output3 = (Input3) AND (Demux=011)").
A series of gates that converts a 3bit binary input to a single active line out of many. They are useful in many ways as they are compact, 5x5x3 at the largest.
As there are many lines combined using implicit-ORs, you have to place diodes before each input into a circuit to keep signals from feeding back into other inputs.
Requirements for each output line (excluding separating diodes):
A series of gates that converts a 4bit binary input to a single active line out of many (eg. 0-9 if the input is Decimal or 0-F if the input is Hexadecimal). They are useful in many ways as they are compact, 3x5x2 at the largest.
As there are many lines combined using implicit-ORs, you have to place diodes before each input into a circuit to keep signals from feeding back into other inputs.
Requirements for each output line (excluding separating diodes):
You also can convert a 1-of-16 signal to a 4bit-binary number. You only need 4 OR gates with 8 inputs each. These have to be isolating ORs to prevent signals from feeding back into other inputs.
For every output line, make an OR gate with the inputs wired to the input lines where there is a '1' in the table below.
The example on the right uses a 4-bit design, so you can handle a hexadecimal key. So you can use 15 various digits, [1,F] or [0,E]. You only can use 15, because the state (0)h == (0000)2 won't activate the system. If you want to handle 16 states, you edit the logic, to interact for a 5-bit input, where the 5th bit represents the (0)h state.
In the following we'll use (0)h := (1111)2. And for [1,9] the MUX-table upon. So the key uses decimal digits. Therefore we have to mux the used buttons to binary data. Here look trough the first two columns. The first represents the input-digit in (hexa)decimal, the second represents the input-digit in binary code. Here you can add also buttons for [A,E], but I disclaimed them preferring a better arranging. The /b1\-box outputs the first bit, the /b2\-box the second, and so on.
Now you see Key[i] with i=1..3, here you set the key you want to use. The first output of them is the 1-bit, the second the 2-bit and so on. You can set your key here with levers in binary-encryption. Use here the MUX-table upon, and for (0)h := (1111)2. If we enter the first digit, we have to compare the bits by pairs (b1=b1, b2=b2, b3=b3, b4=b4). If every comparison is correct, we set the state, that the first digit is correct.
Therefore we combine (((b1=b1 & b2=b2) & b3=b3) & b4=b4) =: (b*=b*). In minecraft we have to use four ANDs like the left handside. Now we save the status to the RS-latch /A\. The comparison works the same way for Key, and Key.
Now we have to make sure, that the state will be erased, if the following digit is wrong. Therefore we handle a key-press-event (--/b1 OR b2 OR b3 OR b4\--/dt-\--/dt-\--). Search the diagram for the three blocks near "dt-". Here we look, if any key is pressed, and we forward the event with a minor delay. For resetting /A\, if the second digit is wrong, we combine (key pressed) & (not B). It means: any key is pressed and the second digit of the key is entered false. Therewith /A\ will be not reset, if we enter the first digit, /A\ only should be reset, if /A\ is already active. So we combine (B* & A) =: (AB*). /AB*\ now resets the memory-cell /A\, if the second digit is entered false and the first key has been already entered. The major delay /dt+\ must be used, because /A\ resets itself, if we press the digit-button too long. To prevent this failure for a little bit, we use the delay /dt+\. The OR after /AB*\ is used, for manually resetting, i.e. by a pressure plate.
Now we copy the whole reset-circuit for Key. The only changes are, that the manually reset comes from (not A) and the auto-reset (wrong digit after), comes from (C). The manual reset from A prevents B to be activated, if the first digit is not entered. So this line makes sure, that our key is order-sensitive.
The question is, why we use the minor-delay-blocks /dt-\. Visualize /A\ is on. Now we enter a correct second digit. So B will be on, and (not B) is off. But while (not B) is still on, the key-pressed-event is working yet, so A will be reset, but it shouldn't. With the /dt-\-blocks, we give /B\ the chance to act, before key-pressed-event is activated.
For /C\ the reset-event is only the manual-reset-line, from B. So it is prevented to be activated, before /B\ is true. And it will be deactivated, when a pressure-plate resets /A\ and /B\.
pros and cons:
|+||you can change the key in every digit, without changing the circuit itself.|
|+||you can extend the key by any amount of digits, by copying the comparison-circuit. Dependencies from previous output only.|
|+||you can decrease the amount of digits by one by setting any digit (except the last) to (0000)b.
|+||you can open the door permanently by setting the last digit to (0000)b|
|-||the bar to set the key will be get the bigger, the longer the key you want to be. The hard-coded key-setting is a compromise for a pretty smaller circuit, when using not too long keys. If you want to use very long keys, you also should softcode the key-setting. But mention, in fact the key-setting-input will be very small, but the circuit will be much more bigger, than using hard-coded key-setting.|
Not really a con: in this circuit the following happens with maybe the code 311: 3 pressed, A activated; 1 pressed, B activated, C activated. To prevent this, only set a delay with a repeater between (not A) and (reset B). So the following won't be activated with the actual digit.
If you fix this, the circuit have the following skill, depending on key-length. ( ||digit|| = 2n-1, possibilities: ||digit||Length )
A door that opens when a certain combination of buttons/levers are on. (Note: A moderate understanding of logic gates is needed for this device.)
Combination Lock Tutorial(Easy To Make And Follow
Combination Lock Tutorial(easy to follow)
Connect a series of buttons to the S-input of RS Latches. Feed the Q or Q (choose which one for each latch to set the combination) outputs of the RS Latches into a series of AND gates, and connect the final output to an iron door. Finally, connect a single button to all the R-inputs of the RS Latches. The combination is configured by using either Q or Q for each button (Q means that the button would need to be pressed, Q don't press) Example:
With the automated reset it causes the correct combo to cause a pulse instead of a "always on" until reset.
The AND based combo lock uses switches and NOT gate inverters instead of the RSNOR latches in the previous design. This makes for a simpler design but becomes less dynamic in complicated systems and it also lacks an automated reset. The AND design is configured by adding inverters to the switches. Example:
The OR combo lock is actually an AND combo lock without unnecessary repeaters, override lever and last inverter. Output is off when the code is correct.
Due to its compact size and fast response time, this combination lock is also ideal for use as an address decoder in the construction of addressable memory (RAM)
Design A. Code is set by torches on inputs (1001):
It is possible to remove the spacing between the levers by replacing redstone wire behind the levers with delay 1 repeaters.
You can expand on this by creating a new level on top of the first and using the same principle as the first level, keep creating them.
Design B. Code is set by inverters in the blue area (001001):
N = number of inputs. K = number of 1's in code.
|Redstone||3N-K-1||2.5N + 2K|
This is a device which sorts the inputs, putting 1's at the bottom and 0's at the top. In effect counting how many 1s and how many 0s there are. The diagram is designed so that it is easily expandable, as shown in the diagram. The bright squares shows how to expand it, and also where the in- and outputs are.
Truth table for a three-bit sorting device:
Opens when a certain order of switches are pressed. You can change the order. (Note: A moderate understanding of logic gates is needed for this device.) Have 4 blocks near each other with a switch and a sign saying 4,3,2 or 1 respectively. 10 blocks to the right and 2 blocks down place a block then place 2 more with a 5 block space. 6 right and 3 up place the block. Label them 4-3-2-1 respectively. Have a 11 block wire or 13 for left to a repeater on the 9th block or 11th for left and on the right side. Place a repeater 2 blocks over with the same wire from it. Connect the left repeaters. to the code changing module. (You may use bridges of cobblestone for getting over other wire and repeaters for boosting the signal. Construct a XNOR Gate where). 2 of the wires meet. Connect to adjacent outputs with AND gates. These Outputs are connected to final AND gate. Final AND gate if connected to iron door.
A door that opens when buttons are pressed in certain order.
(Note: A moderate understanding of logic gates is needed for this device.)
Make a series of buttons, and connect only one to an RSNOR latch. Then connect both the RSNOR latch and a second button to an AND gate, which feeds to another RSNOR latch. Do this continually until you have either filled all of the buttons or are satisfied with the lock. Connect the final RSNOR latch to a separate AND gate with a signal from an enter button. Feed that to the output RSNOR latch. Then connect any of the left-over buttons to the enter button and send reset signals to all of the RSNOR latches. A pressure plate next to a door can reset the door. This type of lock has severe limitations its security. For example, not all the buttons could be used in the pin or there would be nothing to reset the system.
For a lock that can have a combination of any size, using all the buttons, and still have a wrong entry reset the system, you need a different way for it to reset. To construct this, hook up a panel of buttons (any number, but four or more is preferred) to a parallel series of adjacent repeaters. Invert as necessary so that all the repeaters are powered and are unpowered by the press of the corresponding button. These repeaters power a row of blocks. On top of the blocks, place a torch corresponding to the incorrect buttons for the fist number in the PIN. For the correct button/number, place dust under the powered block which leads to a RS NOR Latch. Place a row of blocks above the torches for the incorrect buttons, with redstone dust on top. Then connect this dust to the reset of the first RS NOR Latch. Only the correct button will set the RS NOR Latch and all others will reset it. Connect the output of the RS NOR LATCH to half of an AND gate. After the first row of blocks with the reset torches, place another row of repeaters and another row of blocks. Again place torches for the incorrect buttons and dust under the correct button's line. Power will be fed from the buttons through the rows of repeaters and blocks for as many rows as there are digits in the PIN number. Connect the dust from the correct button to the other half of the AND gate coming from the first RS NOR Latch. Only if the two conditions are met, that the first button was pushed correctly, setting the first RS NOR Latch, and the second button is pushed correctly will the AND gate send a signal to set the second RS NOR Latch. Again, connect a reset line from the incorrect button's torches to the reset of the second RS NOR Latch. NOTE: Delay the reset signals by one full repeater to give time for the next RS NOR Latch to be set before the reset happens. Continue building the array in the same manner until you reach the desired number of digits. In operation, when a button is hit, each RS NOR Latch checks (through the AND gate) to see if the previous RS NOR Latch is set, and the correct button for this RS NOR Latch has been pushed. Only when the correct buttons are pressed in order, will the signal progress through the conditional RS NOR Latches to the end. Connect the output of the last RS NOR Latch to a door and attach a line to a pressure plate inside the door to reset the last RS NOR Latch.
Tutorials Video: Combination Lock RSNOR
There is also another way to make order-sensitive combination locks. It is based on several RS NOR latches that is placed on a row. The RS NOR latches are connected together, and each latch is connected to one button. The combination lock opens when all the latches are activated. To activate all of them, the latches have to be activated in the right order. If wrong button is pressed, the lock automatically sends a reset signal to the first latch, and resets the entire lock. The circuit also has a T flip-flop that controls the output. The T flip-flop turns on and stays on when the right combination is pressed. When the lock is open, all the buttons works like a reset button. This makes it easy to close the door from the outside. Just press a random button. It is also possible to connect buttons that overrides the lock and makes the output signal toggle like on a normal T flip-flop.
This is an order-sensitive combination lock with order sensitive reset function. It works like an ordinary order-sensitive combination lock, but in addition it has a function that resets everything when a button is pressed too early. The function consists of AND-gates that sends a reset signal if the previous button hasn't been pressed yet. The lock does not need a reset button because it resets automatically when the code is wrong.
Timers can detect the time difference between the first input and the second.
The amount of time can be determined by how far the signal travels. For example, if 5 of the locked repeaters are powered, it means the time difference was 0.4-0.5 seconds, ignoring lag. If the time difference is exactly 0.4 seconds, 4 repeaters will be powered.
The repeaters that will lock can be set to different delays. For example, if they are set to 4 ticks and the first 3 are active, it means the time difference was 0.8-1.2 seconds. You can even have a mix, which can be handy if you know what the range is likely to be. However, you will need to be careful when reading these timers.
If you are measuring higher scales, the second signal might not reach all of the repeaters. You will need repeaters to replenish the signal.
If the signals are short times (like if you are using observers), you may not have time to read the data.
You can also measure how long a signal lasts.
Please note the following when making a duration timer:
- Because of the delay that the redstone torch adds, the delay of the initial repeater, the one that stays unlocked, must be increased to 2 ticks.
- The data from the timer will be preserved.
- Because the repeaters will still be powered when the timer is used again, the circuit must be obstructed between uses in order to unlock the repeaters. To do this mine the redstone torch, wait for all of the repeaters to deactivate, and put the redstone torch back.
D flip-flop is an electronic component that allows you to change its output according to the clock. It's and RS NOR latch that sets its value to the D input when the ">" (clock) input is changing its state from low to high (in some cases from high to low).
Basically, it's equivalent to the expression: "Set the output Q to the input D when the input C goes from 0 to 1".
For example, you can use D flip-flops to shift the value from left to right.
In this lock, the > signal propagates from the rightmost flip-flop to the leftmost, so the signal shifts to the right. This curcuit allows you to input a 4-bit number with two levers. You can use any number of bits, but this configuration is already pretty secure even if someone figures out what a lock it is.
So, if you want to input the combination 1-0-1-0, follow these steps:
- D = 1
- > = 1
- > = 0
- D = 0
- > = 1
- > = 0
- D = 1
- > = 1
- > = 0
- D = 0
- > = 1
- > = 0
In theory, you can program the lock from this serial interface as well. Just attach 4 RS NOR latches and a hidden place for the programming levers.
This design is not very practical as a lock, but might be a nice feature on something like a puzzle challenge map.